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VIT EMERGING TRENDS AND CHALLENGES IN CIRCUIT TO SYSTEM DESIGN

VIT  International Virtual Conference on EMERGING TRENDS AND CHALLENGES IN CIRCUIT TO SYSTEM DESIGN

 

 

ABOUT VIT

 

Vellore Institute of Technology (VIT) was founded in 1984 as Vellore Engineering College by the Chancellor Dr. G. Viswanathan. From its humble beginning, the institution has grown exponentially to that of having more than 33,000 students at present. Students from all over India and more than 50 countries are studying at VIT. University status was conferred in 2001 by MHRD Govt. of India in recognition of its excellence in academics, research and extracurricular initiatives. Currently, VIT has 4 campuses – in Vellore, Chennai, Amaravati (AP) and Bhopal (MP). The National Institutional Ranking Framework (NIRF) of the MHRD, Government of India, has identified VIT as the best Private Engineering Institution in India in the year 2016 and 2017. VIT has gone for accreditation by NAAC [India], IET [UK], and ABET [USA] and follows world class academic processes. VIT is the first and only University in India to get 4 star rating from QS, the world universities ranking organization. The Industry consortium FICCI, has declared VIT as the “University of the Year 2016”, in India. VIT has also been ranked in the top 201 -250 in QS

 

ABOUT THE VIRTUAL CONFERENCE

 

This International virtual conference on Emerging Trends and Challenges in Circuit to System Design (IETCCSD-2020) in the field of circuits and system design aims in bringing together, all the stakeholders that includes academia, industry, R&D people who works in the field of hardware and software system design, verification, test, EDA tools development, and manufacturing of electronic circuits. This two days conference creates an excellent platform for the delegates to interact virtually and to provide the solutions for the societal and engineering challenges of our times.

 

REGISTRATION PROCESS

 

Registration for the Virtual Conference IETCCSD-2020 is FREE and can be made by registering through the following online link: https://forms.gle/TNMa5Peg2h3hkb4d9

 

REGISTRATION FEE

 

Selected papers based on the domain and quality will publish in Scopus Indexed journals with the processing fee prescribed by the concerned journal. Payment link and procedure will be sent to the corresponding authors.

 

CALL FOR PAPERS

 

Device Modeling, Analog and Mixed signal design, VLSI Architectures and System Integration, VLSI Testing and Security, System level Design, Hardware for AI and ML, Neuromorphic computing, Miscellaneous (Topics not fitting to the above tracks) Kindly follow the IEEE double column format for paper submission. Paper Submission link: https://easychair.org/conferences/?conf=ietccsd2020

 

IMPORTANT DATES

 

Last date of Submission: 31.07.2020

 

Acceptance Notification: 2.08.2020

 

Contact us

 

Department of Micro and Nanoelectronics,
School of Electronics Engineering,
Vellore Institute of Technology, Vellore-632014, India

 

 

For more details refer the Official Website :     https://vit.ac.in/

 

Information Document 

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